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SSM9926M
DUAL N-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Low on-resistance Capable of 2.5V gate drive Low drive current Surface-mount package
D2 D1 D1
D2
BV DSS RDS(ON)
G2 S2
20V 30m 6A
ID
SO-8
G1 S1
Description
Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness.
D1 D2
G1 S1
G2 S2
Absolute Maximum Ratings
Symbol VDS VGS ID @ TA=25C ID @ TA=70C IDM PD @ TA=25C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current , VGS @ 4.5V Continuous Drain Current , VGS @ 4.5V Pulsed Drain Current
1,4 3 3
Rating 20 8 6 4.8 20 2 0.016 -55 to 150 -55 to 150
Units V V A A A W W/C C C
Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range
Thermal Data
Symbol Rthj-a Parameter Thermal Resistance Junction-ambient Max. Value 62.5 Unit C/W
Rev.2.01 6/26/2003
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SSM9926M
Electrical Characteristics @ Tj=25oC (unless otherwise specified)
Symbol BVDSS Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=250uA Min. 20 0.5 Typ. 0.03 17 18 1.1 7.4 7.2 12.8 30.5 10.5 510 245 110 Max. Units 30 40 1.2 1 25 100 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
BV DSS/ Tj
RDS(ON)
Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA
Static Drain-Source On-Resistance
VGS=4.5V, ID=6A VGS=2.5V, ID=5.2A
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C)
o o
VDS=VGS, ID=250uA VDS=10V, ID=6A VDS=20V, VGS=0V VDS=20V ,VGS=0V VGS= 8V ID=6A VDS=20V VGS=5V VDS=10V ID=1A RG=3.3 , VGS=5V RD=10 VGS=0V VDS=20V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol VSD Parameter Forward On Voltage
2
Test Conditions Tj=25C, IS=1.7A, VGS=0V
Min. -
Typ. -
Max. Units 1.2 V
Notes:
1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec. 4.Pulse width <10us , duty cycle <1%.
Rev.2.01 6/26/2003
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SSM9926M
20
20
T C =25 C
o
V G =4.5V V G =3.5V
16
T C =150 o C
V G =4.5V V G =3.5V V G =3.0V
15
V G =3.0V ID , Drain Current (A)
12
ID , Drain Current (A)
10
V G =2.5V
V G =2.5V
8
V G =2.0V
5
V G =2.0V
4
V G =1.5V
0
V G =1.5V
0 0 0.4 0.8 1.2
0
0.4
0.8
1.2
1.6
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
38
1.8
36
I D =6A
I D =6A
1.6
T C =25 o C
34
V G =4.5V
32
30
Normalized R DS(ON)
1.4
R DSON
1.2
28
1.0
26 0.8 24
22 0 1 2 3 4 5 6
0.6 -50 0 50 100 150
V GS (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
Rev.2.01 6/26/2003
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SSM9926M
8
2.5
7 2 6
ID , Drain Current (A)
5
1.5
4
PD (W)
1 0.5 0 25 50 75 100 125 150 0 50 100 150
3
2
1
0
T c , Case Temperature ( o C)
T c , Case Temperature ( o C)
Fig 5. Maximum Drain Current vs. Case Temperature
Fig 6. Typical Power Dissipation
100
1
DUTY=0.5
Normalized Thermal Response (R thja)
0.2
10
1ms 10ms
0.1
0.1
ID (A)
0.05
0.02
100ms
1
0.01
PDM
0.01
t T
SINGLE PULSE
T c =25 o C Single Pulse
0.1 0.1 1 10
1s
Duty factor = t/T Peak Tj = P DM x Rthja + Ta
100
0.001 0.0001
0.001
0.01
0.1
1
10
100
1000
V DS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.01 6/26/2003
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SSM9926M
f=1.0MHz
16 10000
Id=6A
14
VGS , Gate to Source Voltage (V)
12
V DS =10V V DS =15V
10
V DS =20V C (pF)
8 1000
6
Ciss
4
Coss
2
Crss
0 0 5 10 15 20 25 30 35 40 45 100 1 5 9 13 17 21 25 29
Q G , Total Gate Charge (nC)
V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100
1.2
10
0.95
T j =150 o C T j =25 o C
VGS(th) (V)
IS (A)
1
0.7
0.1
0.45
0.01 0 0.4 0.8 1.2 1.6
0.2 -50 0 50 100 150
V SD (V)
T j , Junction Temperature ( o C )
Fig 11. Forward Characteristic of Reverse Diode
Fig 12. Gate Threshold Voltage vs. Junction Temperature
Rev.2.01 6/26/2003
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SSM9926M
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE 0.5x RATED VDS
RG
G
+ 5v -
S VGS
10% VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG 5V
D
G S
+
RATED VDS
QGS
QGD
VGS
1~ 3 mA
IG ID
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
Rev.2.01 6/26/2003
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